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We're an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for a strong candidate to become a Member of Technical Staff which focuses on HBM Design. Are you passionate about systems and architecture for the next generation of high-performance memory that has wide-ranging applications and inspires change in memory systems? In the HBM Design Engineering team at Micron, we deliver novel solutions to increase bandwidth, and capacity and reduce latency across memory and storage solutions. You will be part of a highly multi-functional team of technical domain experts collaborating closely with a worldwide team of Design Engineering, Product Engineering, Process Development, Package Engineering, and our Business Units to implement a common goal of ensuring our future HBM roadmap is successful. You will apply your deep understanding of memory array architectures, high-speed interface design, logic & custom circuit design, memory subsystem operation, high-performance computing architectures, and 2.5D & 3D package integration to understand and analyze bottlenecks and propose innovative architectures to target best-in-class performance, power, cost, reliability and quality for Micron's HBM product portfolio. The seniority level offered will be based on the combination of experience and education. In HBM DEG (High Bandwidth Memory - DRAM Engineering Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). 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What's Encouraged Daily: Collaborate with the architecture team and external customers on new product specifications Pathfinding to explore new system-level solutions for future HBM products and make recommendations after performing highly technical feasibility analyses Drive interface logic chip and memory architecture solutions Develop circuit designs for the memory array, input buffer, output buffer, control logic, address decode, datapath, internal test logic, power generators, PLL Chip in expert knowledge to advance innovative technical solutions Provide advice and counsel to senior management on significant technical issues Coordinate and lead the layout process, including placement and routing optimization Contribute to cross-group communication to work towards standardization and group success Proactively solicit feedback from Standards, CAD, modeling, and verification groups to ensure the design quality Drive innovation into the future Memory generations within a dynamic work environment How To Qualify: * 3+ years of relevant job/skill-related experience Experience delivering highly technical solutions In-depth technical expertise in one or more areas - DRAM memory array design, high-speed clocking and interface development, analog circuit design, digital/logic and custom circuit design, power delivery optimization, CMOS & semiconductor device physics, 2.5D and 3D packaging technologies What Sets You Apart: Good verbal and written communication skills with the ability to efficiently synthesize and convey sophisticated technical concepts to other partners and leadership Consistent track record of innovation and problem-solving in high-performance memory development A self-motivated, hard-working team player who enjoys working with diverse abilities and backgrounds Having an innovative approach open to improving any of our processes or products. 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